Is VHDL Turing ready?

Is VHDL Turing ready? My understanding is that VHDL creates a registration machine, and these registration machines - no arbitrary RAM - do not terminate Turing.

That's for sure? For problems that cannot be solved in logging machines, is there a standard approach - to use RAM outside of VHDL and manage it through VHDL, for example?

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Another way to show the final completeness is a chain of transformations:

  • Turing machines are complete.
  • Turing machines can be modeled by registration machines and vice versa.
  • Machine registration is an abstract and simple model of a modern processor.
  • You can describe a processor with VHDL


So VHDL ends up complete.

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There are 3 main criteria for Turing completeness :

  • Sequence. do this and then do this and then do the other.
  • Choice. if this and then something
  • Iteration (or recursion). do it over and over until it


The memory requirement is not that it be infinite (which is impossible with modern technology and all languages โ€‹โ€‹will fail), but that it will be unlimited or infinitely extensible: i.e. if you're done, you can add more and try again.

So yes, I think VHDL is definitely the right fit. He can do it all.

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