MFENCE / SFENCE / etc "serializes memory but fails instructions"?
Intel System Programming Guide, Section 8.3, contains information about MFENCE / SFENCE / LFENCE:
"The following instructions are memory sequencing instructions, not serialization instructions that flush the data memory subsystem. They do not serialize the instruction flow."
I am trying to understand why this matters. In multi-threaded code, writing / reading to memory is exactly what needs to be done in a well-defined order. Of course, the order in which the I / O occurs may matter, but the I / O instructions "serialize the instructions" anyway. The CPU needs to reorder instructions that (for example) do the arithmetic in registers as it sees fit; I don't think there is any reason why you want to "serialize" such operations.
Is there any case where a serialization command is really needed, and serializing MFENCE only downloads and stores is "not enough"?
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Is there any case where a serialization command is really needed, and serializing MFENCE only downloads and stores is "not enough"?
Benchmarking and code profiling.
If you are trying to measure the performance of a code sequence, especially if it is very short, it can be important to ensure that parts of the reference operations are not performed out of time. For example, if your code looks something like this pseudocode:
start = RDTSC()
do some stuff
end = RDTSC()
cycles = end - start
It is important to make sure that none of the code in the middle is executed before the first RDTSC
or after the second.
Fortunately, there is a perfect instruction for this: CPUID
fully serializable.
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