I can't get the Xilinx uartlite IP to work

Question

I can't get the Xilinx uartlite IP to work

I am trying to use Xilinx uartlite 2.0 IP with AXI4-lite interface to transfer byte without microblaze processor. Unfortunately, all ready signals remain low after I have set data and valid signals, and the tx signal will never be transmitted.

I have included the simulation results. any ideas?

Xilinx Uartlite 2.0 axi4-lite timing simulation

+3

vhdl verilog xilinx fpga vivado

jwanga 06 June 15 at 17:14

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1 answer

jwanga · Accepted Answer · 2015-06-13T04:31:23+0000

For posterity, had to invert the reset and ensure that all inputs were initialized. Thank you for your helpful comments. I have attached a working simulation enter image description here

I can't get the Xilinx uartlite IP to work

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