Specify the correct constraint for rotation?
I am investigating potential accelerations in relation to a Time Constant Rotation that does not violate standards .
A pivot to x86 / x64 has the following. For simplicity's sake, I'm going to discuss byte rotation (so we're not confused about immediate-8 versus 16, 32, or 64):
- The "value" can be in a register or in memory
- "Account" can be in register or immediate
The processor expects to be in when using a register. The processor rotates by masking all but the bottom 5 bits . count
CL
count
Below , a >. value
x
count
y
template<> inline byte rotLeft<byte>(byte x, unsigned int y)
{
__asm__ __volatile__("rolb %b1, %0" : "=mq" (x) : "cI" (y), "0" (x));
return x;
}
Since it is read and write, I think I should be using . But I can't get the assembler to take it. x
+
My question is, are the constraints specified correctly?
EDIT : Based on Jester's feedback, the function was changed to:
template<> inline byte rotLeft<byte>(byte x, unsigned int y)
{
__asm__ __volatile__("rolb %b1, %0" : "+mq" (x) : "cI" (y));
return x;
}
Literature:
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You must use the correct size type for the operands, trying to get the register to be the correct size using the operand modifier. In this case, it also truncates the immediate operand to the correct size if it is too large. Also, as David Walferd said, you don't want the asm operator to be mutable, as this would prevent it from being eliminated if not used.
template<> inline byte rotLeft<byte>(byte x, unsigned int y)
{
asm ("rolb %1, %0" : "+mq" (x) : "cI" ((byte)y));
return x;
}
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