Ordering automatics with `memory_order_seq_cst`
My reading of the C11 spec regarding ordering of atomic operations suggests that it memory_order_seq_cst
applies to operations on a particular atomic object.
Basically, descriptions are of the form "If A and B apply to M, then order is maintained on M"
My question is specifically about what happens if we have two operations that apply to different atomic objects. Something like the following:
atomic_store(&a, 20); atomic_store(&b, 30);
where a
and b
are atomic (volatile) types (and atomic_store
implies memory_order_seq_cst
).
This issue relates to a memory-mapped situation where the memory card represents the registers of some peripheral.
It is perfectly normal to have write order requirements. Let's say a = 20
sets up a target for our rocket peripheral and set up b = 30
is a launch command. It is clear that we do not want to launch until the missile is properly aimed.
If it matters for anything, it's on ARM Linux with GCC.
source to share
Two memory accesses in the same thread are always sequenced if they occur and if there is a sequence point between them.
The "if they happen" part is guaranteed here if two objects are declared volatile
. This forces the compiler to efficiently emit load or store in memory. How the compiler does this, and how it guarantees it, is entirely implementation-dependent. Read the platform documentation for that.
Operator sequencing has nothing to do with volatile
or atomics. This is implied by the syntax. A good rule of thumb is that at each point ;
, ,
, {
, }
, ?
, ||
and &&
has a point of the sequence. (there is more, but it gets more complicated if you want to reason with them).
Nothing about atomistics. This guarantees indivisibility of operations and consistency of data between threads and signal handlers. The big thing here is to have visible side effects of the operations. It's relatively related, but nothing helps you when you want to discuss things that happen in the same thread. In contrast, the happens-before relationship between threads depends on the sequenced before relationship in the individual threads.
source to share