Inefficient memory access and irregular access to steps
I am trying to optimize this function:
bool interpolate(const Mat &im, float ofsx, float ofsy, float a11, float a12, float a21, float a22, Mat &res)
{
bool ret = false;
// input size (-1 for the safe bilinear interpolation)
const int width = im.cols-1;
const int height = im.rows-1;
// output size
const int halfWidth = res.cols >> 1;
const int halfHeight = res.rows >> 1;
float *out = res.ptr<float>(0);
const float *imptr = im.ptr<float>(0);
for (int j=-halfHeight; j<=halfHeight; ++j)
{
const float rx = ofsx + j * a12;
const float ry = ofsy + j * a22;
#pragma omp simd
for(int i=-halfWidth; i<=halfWidth; ++i, out++)
{
float wx = rx + i * a11;
float wy = ry + i * a21;
const int x = (int) floor(wx);
const int y = (int) floor(wy);
if (x >= 0 && y >= 0 && x < width && y < height)
{
// compute weights
wx -= x; wy -= y;
int rowOffset = y*im.cols;
int rowOffset1 = (y+1)*im.cols;
// bilinear interpolation
*out =
(1.0f - wy) *
((1.0f - wx) *
imptr[rowOffset+x] +
wx *
imptr[rowOffset+x+1]) +
( wy) *
((1.0f - wx) *
imptr[rowOffset1+x] +
wx *
imptr[rowOffset1+x+1]);
} else {
*out = 0;
ret = true; // touching boundary of the input
}
}
}
return ret;
}
I am using Intel Advisor to optimize it, and although the internal one was for
already vectorized, Intel Advisor found inefficient memory access patterns:
- 60% access to unit / zero level.
- 40% access to irregular / random steps.
Specifically, there are 4 prefabricated (irregular) accesses in the following three instructions:
The access collection problem from my understanding happens when the accessible element is of a type a[b]
where it is b
unpredictable. This is similar to imptr[rowOffset+x]
, where both rowOffset
and x
are unpredictable.
At the same time, I see this Vertical Invariant
to happen (again from my understanding) when elements are treated with a constant offset. But I don't really see where the constant offset is
I have 3 questions:
- Did I understand the access collection problem correctly?
- How about vertical invariant access? I'm less sure about that.
- Finally, how can I improve / allow memory access here?
Compiled with icpc
2017 Update 3 with the following flags:
INTEL_OPT=-O3 -ipo -simd -xCORE-AVX2 -parallel -qopenmp -fargument-noalias -ansi-alias -no-prec-div -fp-model fast=2 -fma -align -finline-functions
INTEL_PROFILE=-g -qopt-report=5 -Bdynamic -shared-intel -debug inline-debug-info -qopenmp-link dynamic -parallel-source-info=2 -ldl
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