Difference between MMX and XMM registers?

MM registers are the registers used by the MMX instruction set, one of the first attempts to add (integer only) SIMD to x86. They are 64 bits wide and are actually aliases for the mantissa portions of the x87 registers (but not affected by the top of the FPU of the stack position); this was done to ensure compatibility with existing operating systems (which already retained the FPU stack when context switches), but those made using MMX along with floating point are not a trivial task.

This is currently just a historical oddity, I don't think anyone is actually using MMX anymore as it has been completely replaced by various SSE extensions. Edit: As Peter Cordes points out in the comments, there is still quite some MMX code out there.

The XMM registers are instead a completely separate set of registers introduced by SSE and still widely used ever since. They are 128 bits wide, with instructions that can treat them as arrays of 64, 32 (integer and floating point), 16 or 8 bits (integer only) values. You have 8 of them in 32-bit mode, 16 in 64-bit. Almost all floating point math is done in SSE (and therefore XMM registers) in 64 bit mode, so unlike MMX registers they are still quite relevant.

Nowadays, you can also find the YMM and ZMM registers; they were introduced according to the AVX (2011) and AVX-512 (2015) instruction sets, and they expand the XMM registers, as opposed to the extensions e

and r

, into general purpose registers ( rax

extended eax

, ax

which can be accessed as ah

:) al

.

In an AVX-enabled processor, each register in the XMM register file is expanded to 256 bits. The whole 256-bit register is called YMMx (x from 0 to 15) and can be used by new AVX instructions, the bottom half is XMMx and can be used by old SSE instructions.

Likewise, AVX-512 expands the registers higher up to 512 bits; the entire register is ZMMx (used with AVX-512 instructions), the lower 256 bits are YMMx (also used with AVX instructions), the lower 128 bits are still XMMx (can also be used with SSE). In addition, the number of registers is increased to 32, so these registers are larger and twice as large.